복잡 프로그래머블 로직 장치 - CPLD

5962-9759801QXC(CYPRESS)

CPLD FLASH370Family 3.2KGates 128Macro Cells 5V 84-Pin PGA

Teledyne e2v Semiconductors
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제품 기술 사양
  • 유럽 연합 RoHS 명령어
    Supplier Unconfirmed
  • 미국수출통제분류ECCN 인코딩
    3A001.a.2.c
  • 친환경 무연
    Unconfirmed
  • 미국 세관 상품 코드
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Family Name
    FLASH370
  • Program Memory Type
    Flash
  • Number of Logic Blocks/Elements
    8
  • Number of Global Clocks
    4
  • Number of Macro Cells
    128
  • Product Terms
    16
  • Device System Gates
    3200
  • Data Gate
    No
  • Maximum Number of User I/Os
    64
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Clock to Output Delay (ns)
    10
  • Maximum Propagation Delay Time (ns)
    20
  • Speed Grade
    66
  • Individual Output Enable Control
    No
  • Minimum Operating Supply Voltage (V)
    4.5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Typical Operating Supply Voltage (V)
    5
  • I/O Voltage (V)
    3.3|5
  • Maximum Supply Current (mA)
    250
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Military
  • Tradename
    FLASH370
  • Mounting
    Through Hole
  • PCB changed
    84
  • Standard Package Name
    PGA
  • Supplier Package
    PGA
  • Pin Count
    84

문서 및 자료

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