Clock buffers and drivers can be used for different purposes in digital systems, receiving an input signal or clock, which might be suffering from channel mismatches, losses and skew.  Once that signal is received, it is desirable to resend that signal again, better than when it was received or with good signal integrity, removing the skewed timing, which might have been incurred due to channel characteristics. Clock buffers and drivers can be used in digital system designed to isolate the effects of channel degradations, e.g. impedance mismatches and material losses, from large capacitive loads that will consume almost all margins in the signal. By using a clock buffer, it possible to allocate margins to areas of the system that will need to be protected from other system channel effects. This allows for a clean and strong signal to be driven, often overcoming the effects of an otherwise difficult system design. 

Clock buffers are also useful for similar reasons, including a clock tree distribution implementation where an input clock is buffered and cleaned up before being sent out to a tree of different clock distribution networks. Often it is difficult to drive a large clock tree due to the amount of loading the clock tree network presents to a signal. Clock buffers can improve system-timing performance by maintaining the integrity of the clock signal.